The Verible project's main mission is to parse SystemVerilog (IEEE 1800-2017) (as standardized in the SV-LRM) for a wide variety of applications, including developer tools.
It was born out of a need to parse un-preprocessed source files, which is suitable for single-file applications like style-linting and formatting. In doing so, it can be adapted to parse preprocessed source files, which is what real compilers and toolchains require.
The spirit of the project is that no-one should ever have to develop a SystemVerilog parser for their own application, because developing a standard-compliant parser is an enormous task due to the syntactic complexity of the language. Verible's parser is also regularly tested against an ever-growing suite of (tool-independent) language compliance tests at https://symbiflow.github.io/sv-tests/.
A lesser (but notable) objective is that the language-agnostic components of Verible be usable for rapidly developing language support tools for other languages.
For simple installation, we provide regular binary releases for Linux and Windows, including statically linked binaries for x86 and Arm to run on almost any Linux distribution.
There are also some distributions that include Verible
If you prefer to build and install the binaries locally yourself, see details below in the Developers section.
Learn more about the parser implementation here.
We provide a standalone verible-verilog-syntax tool
to help with visualizing the syntax structure as understood by the lexer and
parser. This is very useful for troubleshooting and understand the internal
representations seen by the other tools.
The tool has an ability of exporting a concrete syntax tree in JSON format, making use of it in external tools easy. There is also a Python wrapper module and a few example scripts.
verible-verilog-lint identifies constructs or patterns
in code that are deemed undesirable according to a style guide. The main goal is
to relieve humans the burden of reviewing code for style compliance. Many