Analog Devices, Inc. HDL libraries and projects for various reference design and prototyping systems. This repository contains HDL code (Verilog or VHDL) and the required Tcl scripts to create and build a specific FPGA example design using the AMD Xilinx and/or Intel tool chains.

The HDL is provided "AS IS". Support is only provided on EngineerZone.

If you feel you can not, or do not want to ask questions on EngineerZone, you should not use or look at the HDL found in this repository. Just like you have the freedom and rights to use this software in your products (with the obligations found in individual licenses) and get support on EngineerZone, you have the freedom and rights not to use this software and get data sheet level support from traditional ADI contacts that you may have.

There is no free replacement for consulting services. If you have questions that are best handed one-on-one engagement, and are time sensitive, consider hiring a consultant. If you want to find a consultant who is familiar with the HDL found in this repository - ask on EngineerZone.

This repository supports reference designs for different Analog Devices boards based on AMD Xilinx and Intel FPGA development boards or standalone.

• AMD Xilinx Vivado Design Suite

or

• Intel Quartus Prime Design Suite

Please make sure that you have the required tool versions.

For building a project (generate a bitstream), you have to use the GNU Make tool. If you're a Windows user, please checkout this page, to see how you can install this tool.

To build a project, checkout the latest release, after that just cd to the project that you want to build and run make:

cd projects/fmcomms2/zcu102
make

A more comprehensive build guide can be found under the following link: https://analogdevicesinc.github.io/hdl/user_guide/build_hdl.html